Synopsys Demonstrates Industry’s First PCI Express 5.0 IP Interoperability with Intel’s Future Xeon Scalable Processor

MOUNTAIN VIEW, Calif., Oct. 13, 2020 /PRNewswire/ —

Highlights:

  • Interoperability establishes end-to-end 32GT/s PCIe 5.0 link between DesignWare IP for PCI Express 5.0 Complete Solution and future Intel Xeon Scalable processors
  • The DesignWare IP for PCI Express 5.0 delivers industry’s lowest latency and highest throughput with optimized power consumption for short and long channels
  • Future Intel Xeon Scalable processors deliver enhanced performance, throughput, and CPU frequencies for AI-infused, analytics, storage & networking workloads

Synopsys, Inc. (Nasdaq: SNPS) today announced its collaboration with Intel to achieve successful system-level interoperability between the Synopsys DesignWare Controller and PHY IP for PCI Express 5.0 and future Intel Xeon Scalable processors (codename Sapphire Rapids). The full-system interoperability, a key milestone in Synopsys and Intel’s ongoing collaboration, enables the ecosystem to confidently use the companies’ proven technologies to accelerate development of their PCIe 5.0-based products in high-performance computing and AI applications. The DesignWare IP for

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